# Maximum distance between tap and active area in same well

For latch-up reasons often rules are given that all source/drain area of transistor have to be below a certain distance from the bulk/well contacts (also called taps). Problem I don't know how to get to the result for being in the same well.
The distance is most of the time much bigger than the minimal well dimension. So the N+ tap in a NWELL should not count as pick-up point for a pactive in a neighboring NWELL even if distance is smaller than the required distance.
I don't immediately see how to do this in klayout.

• edited May 10

Hi,

the usual approach to implement this check is to incrementally size the areas of the taps in steps smaller the minimum well distance and during this, mask with the well area. Repeat this until the total amount of sizing is equal to the required distance. Then check for source/drain regions not being inside this area.

Sounds complex, but isn't

Example: "well" is you well area. "sd" is your source/drain region. "tap" is you tap region. The required distance is 10 micrometer, your minimum spacing is for example 1.5 micrometer. In this case, you can pick a step size of 1 micrometer. Here is the script:

enlarged_tap_inside_well = tap

step = 1.um
distance = 10.um
num_steps = (distance / step + 0.5).to_i
num_steps.times do
enlarged_tap_inside_well = enlarged_tap_inside_well.sized(step) & well
end

errors = sd.not_inside(enlarged_tap_inside_well)

Running the size in steps with the confinement to the well region ensures the enlarged tap won't cross over to neighbouring wells. Plus it will somewhat "trace" the route if a well forms a U-shaped bend. Which is also in the spirit of latch-up-rules as they basically measure sensitivity to bulk potential swings induced by well currents. Which basically also "flow" around the "U" and create a bigger voltage drop. So the greater length in this case corresponds to an actually increased latch-up sensitivity.

Matthias