Verification

Discussion List

• Bisection of DRC checks to find min distance

  98 views 1 comment 0 points Most recent by tomas2004 June 20
• how launch lvs

  153 views 9 comments 0 points Most recent by Matthias April 28
• More info from class NetlistCrossReference

  67 views 5 comments 0 points Most recent by Matthias April 11
• DRC for circle design

  243 views 10 comments 0 points Most recent by jiunnweiyeh March 24
• One side sizing with drc

  71 views 2 comments 0 points Most recent by intervalrain March 17
• Problem extracting mos with fingers using custom Extractor extract_devices

  89 views 2 comments 0 points Most recent by Matthias February 27
• How to display the results of comparator in the netlist browser and generate a customized netlist

  365 views 21 comments 0 points Most recent by dick_freebird February 8
• why I couldnt see the comparation of the layout and the schematic?

  130 views 5 comments 0 points Most recent by WENSHIH February 4
• Exceptions to the results of the "xor" calculation

  74 views 2 comments 0 points Most recent by Bian January 24
• Problems when extract the MOS4 Transistor with override of GenericDeviceExtractor, pin Well empty.

  113 views 16 comments 0 points Most recent by Bian January 24
• How to get the corresponding polygon from an edge collection

  66 views 1 comment 0 points Most recent by Matthias January 23
• How could i merge two polygons in LVS?

  70 views 1 comment 0 points Most recent by Matthias January 23
• How to run LVS with schematiic from pspice?

  80 views 5 comments 0 points Most recent by Matthias January 23
• Is it possible that in the future, the custom comparison parameters can be added in lvs

  59 views 2 comments 0 points Most recent by Matthias January 17
• How to implement an auxiliary layer in LVS, when calculating extracted parameters

  62 views 2 comments 0 points Most recent by Bian January 17
• sized or extended_out in 1 direction

  159 views 9 comments 0 points Most recent by Matthias December 2022
• Curvilinear OASIS format

  530 views 6 comments 0 points Most recent by Matthias December 2022
• DRC to check 45degree angle shapes

  192 views 3 comments 0 points Most recent by Matthias November 2022
• Problems encountered when changing the terminal declaration in the device class

  93 views 6 comments 0 points Most recent by Bian November 2022
• Extent an edge to a box

  79 views 2 comments 0 points Most recent by dai November 2022
• LVS not recognizing interdigitated devices

  174 views 11 comments 0 points Most recent by Matthias September 2022
• Can KLayout open LVS result file which generated by Calibre LVS now?

  348 views 13 comments 0 points Most recent by Max August 2022
• Need to enable L and W parameters to Cap devices

  129 views 10 comments 0 points Most recent by Matthias June 2022
• Return of DRC is not edge pair

  95 views 2 comments 0 points Most recent by dai June 2022
• separation edges to edges issue

  135 views 4 comments 0 points Most recent by dai June 2022
• netlist command in DRC run is very slow and single threaded

  85 views 3 comments 0 points Most recent by Matthias June 2022
• Connectivity Based Stamping check

  195 views 9 comments 0 points Most recent by dick_freebird June 2022
• Capacitance and Resistor LVS checks ignoring R and C values

  140 views 3 comments 0 points Most recent by Matthias June 2022
• with_text

  159 views 3 comments 0 points Most recent by Matthias May 2022
• DRC : all shapes interacting with a given text in a given layer

  100 views 2 comments 0 points Most recent by Matthias May 2022