Discussions
Sign In
Home
›
Verification
Sign In
·
Register
Howdy, Stranger!
It looks like you're new here. If you want to get involved, click one of these buttons!
Sign In
Register
Quick Links
Categories
Recent Discussions
Categories
2.8K
All Categories
36
Help wanted, Jobs wanted
119
Verification
48
File Formats
239
General
147
KLayout Development
318
KLayout Support
115
Layout
526
Python scripting
264
Ruby Scripting
Verification
Discussions related to DRC and LVS
«
1
2
3
4
»
Discussion List
Exceptions to the results of the "xor" calculation
194
views
2
comments
0
points
Most recent by
Bian
January 2023
Problems when extract the MOS4 Transistor with override of GenericDeviceExtractor, pin Well empty.
267
views
16
comments
0
points
Most recent by
Bian
January 2023
How to get the corresponding polygon from an edge collection
219
views
1
comment
0
points
Most recent by
Matthias
January 2023
How could i merge two polygons in LVS?
243
views
1
comment
0
points
Most recent by
Matthias
January 2023
How to run LVS with schematiic from pspice?
260
views
5
comments
0
points
Most recent by
Matthias
January 2023
Is it possible that in the future, the custom comparison parameters can be added in lvs
222
views
2
comments
0
points
Most recent by
Matthias
January 2023
How to implement an auxiliary layer in LVS, when calculating extracted parameters
253
views
2
comments
0
points
Most recent by
Bian
January 2023
sized or extended_out in 1 direction
560
views
9
comments
0
points
Most recent by
Matthias
December 2022
DRC to check 45degree angle shapes
502
views
3
comments
0
points
Most recent by
Matthias
November 2022
Problems encountered when changing the terminal declaration in the device class
221
views
6
comments
0
points
Most recent by
Bian
November 2022
Extent an edge to a box
188
views
2
comments
0
points
Most recent by
dai
November 2022
LVS not recognizing interdigitated devices
473
views
11
comments
0
points
Most recent by
Matthias
September 2022
Can KLayout open LVS result file which generated by Calibre LVS now?
1K
views
13
comments
0
points
Most recent by
Max
August 2022
Need to enable L and W parameters to Cap devices
256
views
10
comments
0
points
Most recent by
Matthias
June 2022
Return of DRC is not edge pair
221
views
2
comments
0
points
Most recent by
dai
June 2022
separation edges to edges issue
391
views
4
comments
0
points
Most recent by
dai
June 2022
netlist command in DRC run is very slow and single threaded
230
views
3
comments
0
points
Most recent by
Matthias
June 2022
Connectivity Based Stamping check
450
views
9
comments
0
points
Most recent by
dick_freebird
June 2022
Capacitance and Resistor LVS checks ignoring R and C values
327
views
3
comments
0
points
Most recent by
Matthias
June 2022
DRC : all shapes interacting with a given text in a given layer
204
views
2
comments
0
points
Most recent by
Matthias
May 2022
Need help with proximity DRC script
252
views
2
comments
0
points
Most recent by
wimbur
April 2022
MOM capacitor extraction
1.9K
views
3
comments
0
points
Most recent by
dick_freebird
March 2022
LVS report
445
views
8
comments
0
points
Most recent by
dai
March 2022
First access to netlist take too much time
207
views
2
comments
0
points
Most recent by
Matthias
February 2022
Difficulties extracting MIM capacitors
348
views
6
comments
0
points
Most recent by
Matthias
February 2022
Extraction MOSFET device in deep mode issue
472
views
11
comments
0
points
Most recent by
Matthias
February 2022
Resistor extraction for transistor level LVS for Sky130nm technology
197
views
1
comment
0
points
Most recent by
Matthias
January 2022
how to get lvs result after comparing
128
views
3
comments
0
points
Most recent by
Matthias
January 2022
Metal perimeter to gate area ratio antenna rule
647
views
8
comments
0
points
Most recent by
allonpa
January 2022
MOSFET 4 terminal extraction
358
views
3
comments
0
points
Most recent by
Matthias
December 2021
«
1
2
3
4
»
Powered by Vanilla