Resistor extraction for transistor level LVS for Sky130nm technology

Hello @Matthias,

I'm trying to develop an LVS deck for sky130nm technology, when I try to extract a resistor Klayout complains that there's no value for R, which is not actually in the spice from the pdk.

an example for a subckt that has resistors:

.subckt sky130_fd_sc_hd__conb_1 VGND VNB VPB VPWR HI LO                                                                                                                                                          
 R0 VGND LO sky130_fd_pr__res_generic_po w=480000u l=45000u                                                                                                                                                       
 R1 HI VPWR sky130_fd_pr__res_generic_po w=480000u l=45000u                                                                                                                                                       
.ends

From my understanding, and correct me if I'm wrong, the R value should be calculated internally from the W, L and rho_sheet.

My work around: Added a temp value for R in the spice (to satisfy the netlist reader) and disable the comparison for that parameter, and use the W and L for comparison. But this work around needs manual modifications in the spice, which is not optimal (putting in mind that I get this spice from the pdk). My implementation for LVS can be found here.

Thank you.

Best,
Marwan

Comments

  • Hi Marwan,

    KLayout does not read the resistor model nor does it calculate the values, I'm sorry. It's not a simulator.

    Matthias

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