I believe this is the tip of a coming iceberg, "chiplet mania" is going to demand ability to have "multi-tech meta-PDKs" if bottom-to-top design of 2.5D ICs is going to be a thing (true 3D, you're gonna need that third dimension …
Pixels are inherently integer and therefore are going to end up toggling around rounding error.
Grain of sand or no grain of sand. Dust is with the wind.
Paths act funny in big-$ tools too. I much prefer 45'd and 90 hand drawn on-grid rectangles for my work. They stretch predictably and overlap clean.
Of course this is not digital mainstream, never was.
Paths can be drawn with properties that…
Are you merging for some reason?
Making it all into a single polygon with a huge vertex
count seems like inviting mishap. Especially when
working at non-45-integer-multiple, rounding error
(and lacking a finishing snap-to) might be the source
of …
<=0.42 may be a "dogbone" FET (contact plus
oversize AA =0.42 min?). If so then there is a
definite polygon-level "break" in the relation of
as, ad, ps, pd to W.
Now why the extractor couldn't just fork the
geometry math, i…
I know nothing about scripting but somehow
this doesn't look like it takes action to save the
revised / product layout. Or where does the
produced data end up? As part of the source
layout (as none is declared or opened)?
Does your layertable ha…
Some people really like the auto-place and flight lines. To me they're a half-a$$ed guess (placed only as neatly as schematic is drawn - if that - and then cluttered up). I know where each transistor belongs and how signal flow is, so what's an alg…
Still think this is rounding error residue / "DBU beat frequency" stacking up.
Does your source data have such a funky DBU initially?
If so then maybe you must first upscale DBU per distance to a least-common-multiple, rasterize tha…
I've never cared about this or seen a rule for it. You might benefit by posting a rules page or something, to show the "logic" as the foundry (?) sees it.
I think it will go best for you, if the scale factors
are "round number" multiples / divisors. Can't do
"fractional pixels" so you end up "notchy" in any
conversion / resizing, unless integer multiples of
initial DBU?…
Yesterday I encountered by chance. the new-to-me
Brand X "Selection Protection" feature.
I al,so have discovered that the old "inmstance box"
scheme I so love, has been broken for some time (was
a big thing back around 2010, …
Yes, this sounds like on-theme (how to untangle multiple selectables).
This particular scenario IMO wants the "pop up preselection list". We could talk about what that does or doesn't do. Could have "class" filters (instance, PC…
If this is about choosing -which one- of multiple selectable instances, then that's another face of the other "locking" thread.
Sometimes you can "riffle through the deck"
by continually clicking and watching the lower lwft cor…
While my preference remains for the "instance
selectable extent modifier rectangle" (Brand X
use of instance/drawing layer object to supersede
the raw cell-extent), I could see something like use
of GDS properties to make a per-instance…
I don't believe so, although this is something I've also asked for in the past. Personally I prefer a "selectable extent" polygon approach (ala Brand X's use of the instance/dwg layer, although this is becoming "busted" in some…
One thing that might be handy, presuming deep access to PDK, is to create for each "slottable" layer, a LayerN_slot counterpart. This would be directly checkable for size as plain rect or polygon (for my 45s). Tapeout would use a Boolean A…
Tutorial is a big help for git-clueless like me.
A semi-smart script which would determine the
target-host "all needed packages" and maybe also
inquire about the build desired particulars (like all
the associated options, are they desir…
I see similarities here, to what Brand X does - sorta.
Brand X does not verify directly against layout. There
is an "extract" process which creates a new cellview
("extracted") and creates a flat (at least, in the versions
of ve…
Might I suggest a "watchdog timer" that will "shake the Etch-a-Sketch" if it ends up "stuck"? That's an approach in systems for making layers of "self-righting" (this being the back-backstop).
Then that ev…
The other way I have seen (may have mentioned) is to proliferate in-layer "purposes" and enforce a discipline that can be "codified" in DRC and LVS.
For example Met3 (33,0) might be attended by M3VDDA, M3VDDA, M3PGND, M3HV... …
Very interesting. So now I must ask another question -
is it possible to use the same scheme (!blahblah append)
to somehow "tag" a device by its name (recent discussion)
or any concerns with it?
and another, can !blahblah and !anotherthin…
I think there's a lot of opportunity to add a "meta"
layer using the properties but that seems like it
needs a lot of thought and definition, and risks
to back-compatibility to lesser GDS editors might
be lost?
However if the meta "…
In my (industrial) experience the voltage rating
runs with the device design specifics and the
unique device master should point to the rule.
The "vanilla CMOS" flows that have come out
for OSEDA tend to not exercise this (even old
MOSIS…
Let me relate what I think I understand about how
Brand X does (or used to do) it.
Just as a schematic may have a symbol or "stop on"
an alt view (like veriloga or spectre), for verification
I see "auLVS" reps on occasion. Beli…
Let me pose a "pathfinder" question-bundle.
Suppose that I made a transistor layout of fixed
geometry. Further suppose that I wanted to place
a text in that layout, which would "reflect" a GDS
"property" added (say, c…
Re the cutter experiment that didn't work out - might need to look
at the logic of the "source" terminal identification, may be that
things still get "over-merged" by some other layers' meddling?
Like connect statement if the m…
There should be prune rules somewhere? But sounds like
you want them applied "surgically"?
Perhaps the rule that does the pruning, could be modified
or enhanced to make a net that contains a pin-polygon (I
guess we don't do that over her…
Yes, I think we understand it the same. I'm thinking that smart
folks could come up with a simple architecture for using
properties (how many uses, really?), set a standard (API?)
and then enable more sophisticated yet less difficult checking
a…