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Reading the tutorial "More Operations" (FSiC 2019 pg 23/62) I am a bit unclear about the notation
"a-b" (NOT)
I expect that this would be used like
c = a-b
I think this form's result might be "ANDNOT"? (a and not(b))
What if I wanted to make an actual "NOT" of a layer - is there a unary operator (like, say, !layer)?
Such that if I wanted to, I could make the ANDNOT operation by
c = a & !b
Just hoping for a little clarification
Comments
Specifically I have one derived layer that is not-a & not-b & not-c - how can I ANDNOT them all when there's no "positive logic" item to subtract (ANDNOT) from?
Hi Jim,
For "not" you always need a background layer (which is the chip's dimension). There needs to be a outer bound somewhere (no infinite space, sorry). You can take the layout's extension, but the cases I know always have some drawn boundary layer.
So "not a" can be implemented as "boundary - a".
And "not-a & not-b & not-c" is logically equivalent to "boundary - (a + b + c)". Which is also faster.
Matthias
Thanks, Matthias,
My technology does not have a "boundary" / "bulk" layer but maybe I can fake it.
Am I correct that the "NOT" logic is really "ANDNOT"?
Hi Jim,
yes, "NOT" is basically always "AND NOT". But I have not seen a layout so far without a boundary - every chip finally needs to have a physical size.
If you know the size, you can generate this layout inside your DRC:
If you want you can also make this layer "infinitely large" (like 20x20mm). There is a limitation by the database unit - you should not exceed a range of roughly -1e9 .. 1e9 database units.
Matthias
Hi Matthias-
How can I make the above work on 2.5d?
I tried to use it in order to get the invert of a layer but it does not seem to work.
late edit: Found a boundary layer in my layout so I'm using it, but not sure all designs/techs will have such boundary layer
Thanks, Itamar
My understanding is that any layer would do, even one
you make up yourself for no other purpose.
But technologies developed with a major CAD vendor
(or according to their normal practices) will probably
have a "bulk" or similar "valid chip extents" layer for
the usual, similar uses.
Probably can use anything as long as you clean up
after yourself. But a no-harm "freebie" (like bulk/drawing)
is likely best if you can find it or something like it.
boundary/drawing is a non-printing layer and should
be OK (unless its presence steps on some other rule).
You could do a quick search through the rules decks
to see whether "boundary" is likely to meddle, if left
laying about.
Thanks for your comment dick_freebird.
In my company there are many designs (coming from major CAD tools vendors) and I think most of them have a bulk layer in the design, but not necessarily the same layer number in each design.
I would like to have a single 2.5d macro file for all designs on the same technology node but am not sure all different design files will each have a bulk layer or the same bulk layer number.
I tried the above (boundary = polygons, polygons.insert). All layers using boundary in the 2.5d macro do not get drawn in the 2.5d view.
Do you see the same on your side?
Thanks much,
@mikamar Could you paste an example of what you are doing?