How to extract netlist with LVS, but separating nets connected through subcircuit

taylorn

Hello, first time poster.

I'm attempting to extract a netlist with LTN/LVS, but there are cells within the layout that have connected wires from one port to another. I would like to find some way to differentiate between those, and perhaps find a netlist representation that separates the two pins.

Here's an example (see the image below):

The top image is the flattened layout, the bottom image shows the hierarchy.

Here's (a test version of) my extraction code:

import klayout.db as kl
layout = kl.Layout()
layout.read("weird.gds")
single_layer = layout.layer(kl.LayerInfo(1,0))
lvs = kl.LayoutVsSchematic(kl.RecursiveShapeIterator(layout,layout.top_cell(),single_layer))
layer1 = lvs.make_layer(single_layer,"layer1")
lvs.connect(layer1,layer1)
lvs.extract_netlist()
print(lvs.netlist())

And the output is

circuit connection ($1=$1);
end;
circuit TOP ();
    subcircuit connection $1 ($1='pin1,pin2');
end;

Perhaps this is the best we'll be able to get based on the construction of the layout, but it is annoying that it combines pin1 and pin2 into a single net. Is there a way to separate them somehow? Not necessarily in the netlist itself, but at least some way to differentiate the two sides as different nets?

I think this is what build_all_nets is supposed to be for, reading its documentation, but I can't figure out what build_all_nets actually edits. If possible, could someone write some code to show how to use it and what it outputs, if this indeed does what I want? Thanks so much!

Noah

Matthias

Hi Noah,

you cannot. A single net from a subcircuit has one logical pin only. It's quite common to connect nets across subcircuits (e.g. power rails through chains of standard cells), so it does not make sense to differentiate by default. Also, a subcircuit typically has one pin for each net in the schematics, regardless whether you connect to this net from one or two or many sides. Maintaining the single-pin nature of the net is essential for the LVS compare step.

After all, a "net" by definition is the collection of all shapes that are electrically connected. So it is perfectly legal to create one net, as both side are always connected.

One way to solve your issue is to insert some artificial device - typically a zero Ohm resistor (called a break) - into the connection. That forces the pins to become disconnected. You can achieve this by defining a marker layer and drawing a rectangular marker on the connection. Then extract this piece like a resistor.

If you look for sample code for "build_all_nets", you can check the test sources here: https://github.com/KLayout/klayout/blob/master/testdata/ruby/dbLayoutToNetlist.rb. "build_all_nets" is a pretty versatile function, hence with a lot of options.

Matthias