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Can we use the bulk (all chip area) as a (symbolic-)layer in the technology defenition for the net-tracer?
( section of the .lyt file)
The bulk is already known for LVS, see "connect_global(bulk, VSS)" at page https://www.klayout.de/doc-qt5/manual/lvs_connect.html
Comments
@nlyeenho No sorry, the net tracer is purely based on polygons. There are no global nets like the LVS has. The net tracer is very simplistic in fact.
But you can draw a big rectangle over everything and connect to that if you need to.
Matthias