It looks like you're new here. If you want to get involved, click one of these buttons!
Hi @Matthias ,
We are developing an LVS rule deck when we are working with R and C on chip. R and C values are not really important as they may vary with temperature and other factors. Usually, the netlist provided from the front-end has only 2 values W and L. As the device value doesn't really matter. When we passed a device with no R and C. Klayout complained although we used ignore parameter command:
ignore_parameter("myres", "R")
Is there a way to force the tool to totally ignore R and C in reading for the devices that we issue ignore parameter for. Meaning that if it's missing, it totally ignores it.
Loooking forward to hearing from you.
Regards,
Amro
Comments
Hi Amro,
I think you refer to this post, which was basically about the same question: https://www.klayout.de/forum/discussion/comment/7990#Comment_7990
Maybe you can give me some more details - what was the message you got and how did you model the devices?
Matthias
Hi @Matthias ,
Thanks for your reply.
Here is an example on the device that we need to get extracted. the netlist itself doesn't contain c parameter for the capacitor device.
and here is the error message:
for more details, we included example layout, LVS deck, and example netlist for testing:
https://drive.google.com/drive/folders/1Vjc34iVOjcOlc143b6XxbIaCYeXfEFkd?usp=sharing
Thanks in advance.
Mohanad
I see and thanks for the test case.
The problem is not upon checking, it's upon reading the Spice file. Unfortunately there is not the "one" Spice specification. There are multiple flavours and in this specific case, there is an ambiguity between model name, value specification and a potential third bulk pin.
KLayout recognizes these forms of cap specs:
Your case matches the first one, except that the value is missing. You can fix this in your case by customizing the Spice reader:
This will give you caps with a value of 0. You can then apply "ignore_parameter" to skip the capacitance value check.
Matthias