split_gate for netlist object

Comments

• dick_freebird

  January 2023 edited January 2023

  Well crafted SPICE models will give you different (subtly)
  outcomes from (say) a 100/0.18 and a (10)10/0.18 FET.
  Your verification ahould not ignore or obscure this if any
  analog matching interests are involved. Probably want to
  make this a "switch" in the LVS (where you can decide
  whether or not to allow) rather than in the extract, where
  it may get "baked in" but invisibly so.
• Matthias

  January 2023

  Hi Jim,

  "split_gates" is not available for schematic, but you can easily add this feature:

  
      # Somewhere beginning of LVS script
      def split_gates_on_netlist(netlist, device_name, circuit_pattern = "*")
  
        dc = netlist.device_class_by_name(device_name)
        if ! dc
          raise("'#{device_name}' is not a valid device name") 
        end
        if ! dc.respond_to?(:join_split_gates)
          raise("Device '#{device_name}' is not a kind supporting 'split_gates'") 
        end
  
        netlist.circuits_by_name(circuit_pattern).each do |c|
          dc.join_split_gates(c)
        end
  
      end
  
      ...
  
      # Use it on schematic:
      split_gates_on_netlist(schematic, "device_name")
  
  

  Regarding extraction (and compare I assume) of the finger ("m") parameter: I think that can be added, but I see a number of open questions - e.g. how to add two devices with different widths.

  Kind regards,

  Matthias
• dai

  January 2023

  Hi @Matthes ,
  It works perfectly

  Thank you,
  dai