Max
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- Max
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@dai - do you need this for one-time thing, or for academic purposes, for research, or for commercial applications?
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"Actually, OpenRCX does not extract the parasitic ; it calls the software recommended by the foundry" That's hilarious. FOSS pointer to a commercial tool recommended by the foundry.
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"this code is not easy to read." That's the world of FOSS EDA tools (with very rare exceptions, like Klayout).
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Design resistors are (almost) always simple rectangles with terminals located on the opposite sides, corner to corner. Then you get a simple resistance formula: R=W/L*rsh. For complex (non-1D) layouts like this, you need to mesh your area, apply pr…
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There are so many ways that you can use to perform capacitance simulation ("extraction") for relatively simple layouts, both free, or affordable, or commercial and expensive - but they may already be available to your teams designing RF, M…
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Practically all design (not parasitic) resistors (their "bodies", or, more specifically, seed layers/shapes) are simple rectangles - poly, diffusion, well, hi-res metal, LVS resistors, etc.
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This is an interesting discussion. Matthias - thank you for listing all the differences, between GDS and OASIS - it's very useful to know. Let me add my two cents. Many years ago, I was pleasantly surprised by the fact that OASIS files are much sm…
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Calibre LVS database (svdb) is proprietary and binary. It can be converted to CCI (Calibre Connectivity Interface) database using Calibre Query Server. CCI database is an input for any standard parasitic extraction tool (StarRC, Quantum QRC, etc.).…
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You are welcome!
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I have been using Klayout over the last 15 years, on a daily basis, and I absolutely love it. It is the only FOSS tool that is on par and often by far exceeding commercial tools in the same category. This is simply insane, unheard of. That being sa…
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Most of the IC designers and layout engineers have no clue where tf and dry files are located - and they do not need to know that. Think about the end users, not about developers - that will make an EDA tool user-friendly. People working with 2-3 …
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Thank you, Stefan!
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This is definitely a useful feature. However, in many cases, especially for the latest technologies, foundry PDKs change frequently, and maintaining lip file, to track all the changes, is not the best way, and puts more load and stress on CAD group…
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Stefan, where did you get a Klayout build for M1 Mac? Or did you build it yourself? (I do not see M1 build on Klayout Download page).
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I have a good reference point, for Klayout capacity. A few years ago, I was able to load in Klayout a GDS file for full chip of an application processor for the most advanced smartphone, implemented in the latest technology node, at that time. As f…
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Is this effect the same with what's called "seed promotion" in Calibre? I have not dealt with it myself, but I know from my colleagues that this is a very nasty problem, that does not have a nice solution...
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I have seen companies using scripts to check for empty intersections of neighboring metals, and filling them with vias. Obviously, this goes one step beyond just checking the missing vias. Whether that is enough or not, and what's the criteria for …
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Automated preparation of input files for field solvers like FastCap or FastHenry sounds like a fun and useful functionality. However, I have a question - what would be the main usage model of this functionality? Where does it fit, in the spectrum …